Processamento de fluxos de dados em arquitecturas híbridas CPU/Intel® Xeon Phi
Stream processing, also known as data-flow processing, is a parallel computing paradigm that enables the implementation of solutions for handling large volumes of data generated at high rates and with short processing time requirement. This paradigm is important for the implementation of monitoring systems, namely in the stock market, in health, and in the fraud detection. The deployment of a stream processing systems require massively parallel hardware, such as clusters or graphics processing units (GPUs). However, the use of these platforms for processing data flows raises some problems, such as the latency of data transmission between nodes of a cluster system , or the lack of global synchronization in GPUs (which implies the transfer of control between the GPU and the CPU).
In the thesis we explore the use of the Intel Xeon Phi, a processor developed by Intel, based on its Many Integrated Core (MIC) architecture. The Intel Xeon Phi is able to run x86 binary code, a fact that enables the porting of some Stream Processing systems, namely Intel’s Threading Building Blocks Flow Graph, to run on the co-processor. Yet, there is no system able to harness the individual characteristics and combined computing power on heterogeneous CPU(s)/Intel Xeon Phi nodes for processing streams of data.
In this context, the goal of this thesis is to propose a Stream Processing system capable of running in heterogeneous CPU(s)/Intel Xeon Phi nodes. For that purpose, we will extend Intel’s Threading Building Blocks Flow Graph library with the ability to run on this new environment, with minimal impact on the library’s programming model. Our proposal was evaluated from a performance perspective, through the comparison of stream processing using only the CPU with stream processing using CPU/Xeon Phi. Which has proven to be quite positive.
Faculdade Ciências e Tecnologia, Universidade Nova de Lisboa